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Title: Nonlinear Characterization and Distortion Mitigation in Six-Port Modulator
Authors: Pathak C.
Rawat, Karun
Published in: IEEE Transactions on Instrumentation and Measurement
Abstract: This paper presents the characterization of six-port modulator for various hardware impairments with scheme for their digital correction. Six-port modulator is low-cost and wideband, which is easily scalable to mm-wave frequencies due to its simplified architecture. However, similar to quadrature modulator, six-port modulator also has few impairments resulting into distortion in terms of output spectrum with adjacent channel leakage, I/Q imperfections, and carrier leakage. These hardware imperfections and impairments are characterized, and the digital predistortion is then applied at baseband data to mitigate the distortion appearing at the output of six-port modulator. A neural network model is employed as inverse model in digital predistorter due to its inherent structure capable of modeling cross-interference, nonlinearity, and dc bias. The proposed characterization and distortion mitigation system is tested for modulating 64- and 256-quadrature amplitude modulation (QAM) data with the speed of 100 and 400 Mbps, respectively. These are modulated to radio frequency carrier at 2 GHz. Without a digital correction, the adjacent channel leakage ratio and error vector magnitude (EVM) does not qualify the industry standard. After the digital correction, the EVM of value as high as 20.14% in case of 256-QAM is reduced to 2.15%, which comply with the industry requirements. © 1963-2012 IEEE.
Citation: IEEE Transactions on Instrumentation and Measurement (2019), 68(4): 1178-1188
Issue Date: 2019
Publisher: Institute of Electrical and Electronics Engineers Inc.
Keywords: Carrier leakage
long-term evolution (LTE)
neural network (NN)
nonlinear characterization
six-port modulator
ISSN: 189456
Author Scopus IDs: 57203712297
Author Affiliations: Pathak, C., Department of Electronics and Communication Engineering, IIT Roorkee, Roorkee, 247667, India
Rawat, K., Department of Electronics and Communication Engineering, IIT Roorkee, Roorkee, 247667, India
Funding Details: Manuscript received March 26, 2018; revised May 31, 2018; accepted July 4, 2018. Date of publication August 21, 2018; date of current version March 8, 2019. This work was supported by the DST, Extra Mural Grant: SB/S3/EECE/047/2014, Government of India. The Associate Editor coordinating the review process was Jesús Ureña. (Corresponding author: Chetan Pathak.) The authors are with the Department of Electronics and Communication Engineering, IIT Roorkee, Roorkee 247667, India (e-mail:;
Corresponding Author: Pathak, C.; Department of Electronics and Communication Engineering, IIT RoorkeeIndia; email:
Appears in Collections:Journal Publications [ECE]

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