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Please use this identifier to cite or link to this item: http://repository.iitr.ac.in/handle/123456789/8379
Title: Impact of driver size and interwire parasitics on crosstalk noise and delay
Authors: Sharma D.K.
Kumar Kaushik, Brajesh
Sharma R.K.
Published in: Journal of Engineering, Design and Technology
Abstract: Purpose - The purpose of this research paper is to analyze the combined effects of driver size and coupling parasitics on crosstalk noise and delay for static and dynamically switching victim line. Furthermore, this paper shows the effect of inductance on delay and qualitatively optimizes its value to obtain minimum delay.Design/methodology/approach - The interwire parasitics are the primary sources of crosstalk or coupled noise that may lead to critical delays/logic malfunctions. This paper is based on simulating a pair of distributed resistance inductance capacitance (RLC) interconnects coupled capacitively and inductively for measurements of crosstalk noise/delay. The combined effects of driver sizing and interwire parasitics on peak overshoot noise/delay are observed through simulation program with integrated circuit emphasis (SPICE) simulations for different switching patterns. Furthermore, the analysis of inductive effect on propagation delay as a function of coupling capacitance is carried out and the optimization of delay is worked out qualitatively. The simulations are carried out at 0.13 ÷m, 1.5 V technology node.Findings - This paper observes the contradictory effects of coupling parasitics on wire propagation delay; however, the effect on peak noise is of a different kind. Further, this paper shows that the driver size exhibits opposite kind of behavior on propagation delay than peak over shoot noise. It is observed that the delay is affected in presence of inductance; thus, the optimization of delay is carried out.Originality/value - The effects of driver sizing and interwire parasitics are analyzed through simulations. The optimum value of coupling capacitance for delay is found qualitatively. These findings are important for designing very large scale integration (VLSI) interconnects. © Emerald Group Publishing Limited.
Citation: Journal of Engineering, Design and Technology (2014), 12(4): 475-490
URI: https://doi.org/10.1108/JEDT-08-2012-0036
http://repository.iitr.ac.in/handle/123456789/8379
Issue Date: 2014
Publisher: Emerald Group Publishing Ltd.
Keywords: Crosstalk noise
Delay
Driver
Inductance
Interwire parasitics
Optimization
ISSN: 17260531
Author Scopus IDs: 55581078400
57021830600
56591002200
Author Affiliations: Sharma, D.K., Department of Electronics and Communication Engineering, Meerut Institute of Engineering and Technology, Meerut, India
Kaushik, B.K., Department of Electronics and Computer Engineering, Indian Institute of Technology, Roorkee, India
Sharma, R.K., Department of Electronics and Communication Engineering, National Institute of Technology, Kurukshetra, India
Corresponding Author: Kaushik, B.K.; Department of Electronics and Communication Engineering, Meerut Institute of Engineering and TechnologyIndia
Appears in Collections:Journal Publications [ECE]

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