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Please use this identifier to cite or link to this item: http://repository.iitr.ac.in/handle/123456789/8188
Title: Crosstalk analysis for a CMOS-gate-driven coupled interconnects
Authors: Kumar Kaushik, Brajesh
Sarkar S.
Published in: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Abstract: This paper deals in crosstalk analysis of a CMOS-gate-driven capacitively and inductively coupled interconnect. Alpha power-law model of a MOS transistor is used to represent a CMOS driver. This is combined with a transmission-line- based coupled-interconnect model to develop a composite driver-interconnect-load model for analytical purposes. On this basis, a transient analysis of crosstalk noise is carried out. Comparison of the analytical results with SPICE extracted results shows that the average error involved in estimating noise peak and their time of occurrence is less than 7%. © 2008 IEEE.
Citation: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (2008), 27(6): 1150-1154
URI: https://doi.org/10.1109/TCAD.2008.923259
http://repository.iitr.ac.in/handle/123456789/8188
Issue Date: 2008
Keywords: Coupling
Crosstalk noise
Inductance
Integrated-circuit interconnect
Signal integrity
Transmission lines
ISSN: 2780070
Author Scopus IDs: 57021830600
7403239706
Author Affiliations: Kaushik, B.K., Department of Electronics and Electrical Engineering, G. B. Pant Engineering College, Uttarakhand, Pauri Garhwal 246001, India
Sarkar, S., Faculty of Engineering, Mody Institute of Technology and Science-Laksmangarh, Rajasthan, Sikar 332 311, India
Corresponding Author: Kaushik, B. K.; Department of Electronics and Electrical Engineering, G. B. Pant Engineering College, Uttarakhand, Pauri Garhwal 246001, India; email: brajesh_k_k@yahoo.com
Appears in Collections:Journal Publications [ECE]

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