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Please use this identifier to cite or link to this item: http://repository.iitr.ac.in/handle/123456789/27580
Title: Two dimensional analytical subthreshold swing model of a double gate MOSFET with Gate-S/D underlap, asymmetric and independent gate features
Authors: Vaddi R.
Dasgupta, Sudeb
Agarwal R.P.
Published in: International Conference on Electronic Devices, Systems, and Applications
2011 International Conference on Electronic Devices, Systems and Applications, ICEDSA 2011
Abstract: A novel analytical model for subthreshold slope of a generic double-gate MOSFET (DGMOSFET) with gate-to-source/drain underlap is proposed. The accuracy of the new model is verified based on comparisons with previously published models, experimental data and numerical simulation results. With the reduction in body thickness, an improvement in underlap independent gate (4T) DGMOSFET subthreshold slope value is observed, particularly as back gate oxide asymmetry would increase in comparison to that of front gate oxide thickness. Models demonstrate that asymmetric work function underlap 4T DGMOSFETs would have better device subthreshold slope value along with increased back gate oxide asymmetry. © 2011 IEEE.
Citation: International Conference on Electronic Devices, Systems, and Applications (2011): 67-72
URI: https://doi.org/10.1109/ICEDSA.2011.5959057
http://repository.iitr.ac.in/handle/123456789/27580
Issue Date: 2011
Keywords: Asymmetric double gate MOSFET
back gate effects
gate underlap engineering
Independent gate (4T) DGMOSFET
subthreshold swing model
Tied gate (3T) DGMOSFET
ISBN: 9781612843896
ISSN: 21592047
Author Scopus IDs: 26538319600
57191737302
7402481365
Author Affiliations: Vaddi, R., Microelectronics and VLSI, ECE Department, Indian Institute of Technology Roorkee, Uttarakhand, India
Dasgupta, S., Microelectronics and VLSI, ECE Department, Indian Institute of Technology Roorkee, Uttarakhand, India
Agarwal, R.P., ECE Department, Shobhit University, Meerut, Uttarpradesh, India
Funding Details: 
Corresponding Author: Vaddi, R.; Microelectronics and VLSI, , Uttarakhand, India; email: Vaddiramesh2k9@gmail.com
Appears in Collections:Conference Publications [ECE]

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