Analog performance analysis of dual-k spacer based underlap FinFET

Abstract

In this paper we have analysed the analog performance of conventional as well as dual-k spacer based underlap FinFET. Dual-k spacer in underlap FinFET is used to improve the gate electrostatic integrity. The inner high-k spacer helps in better screening out of gate sidewall fringing fields, thereby, increasing transconductance and reducing output conductance with increase in total gate capacitance. We have observed that, as compared to conventional single spacer design, the gain of dual-k spacer based design can be doubled (≥ 6dB) without affecting cutoff frequency. More so, the doping gradient can be relaxed to 9nm/dec in case of dual-k spacer based underlap N/P-FinFET because of excellent control over short channel effects and improved analog performance. © 2012 Springer-Verlag.