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Title: Dual input digitally controlled broadband three-stage doherty power amplifier with back-off reconfigurability
Authors: Barthwal A.
Rawat, Karun
Koul S.K.
Published in: IEEE Transactions on Circuits and Systems I: Regular Papers
Abstract: This article presents a design strategy to improve the bandwidth of the three-stage Doherty Power Amplifier (DPA) by controlling the phase difference between the dual RF inputs digitally. The theory also proposes multiple back-off reconfigurability without using tuning elements and extra circuitry. The proposed theory is validated by demonstration of a dual-input three-stage DPA which is designed and implemented using Wolfspeed's GaN HEMT transistors. The measured results show a drain efficiency of 50.4-58% and 46.1-65.4% at 12 dB and 6 dB back-off respectively, over the frequency range of 550-900 MHz. Over this 350 MHz band, the drain efficiency is between 53.97% and 71.5% at saturation, corresponding to 48.3% fractional bandwidth. The measurement results also show that both the back-offs are reconfigurable by changing the drain bias of main and first auxiliary power amplifier. The modulated measurements are carried with a 10 MHz LTE signal with a PAPR of 11.75 dB. The high average efficiency of 51.6%, 54.9%, and 52.6% is reported at 600, 700, and 800 MHz, respectively, at an average power of around 30 dBm. The measurement results validate the theory proposed making the presented DPA as a potential candidate for future wireless transmitters. © 2004-2012 IEEE.
Citation: IEEE Transactions on Circuits and Systems I: Regular Papers, 68(4): 1421-1431
Issue Date: 2021
Publisher: Institute of Electrical and Electronics Engineers Inc.
Keywords: Broadband
Doherty power amplifier (DPA)
Efficiency enhancement
Load modulation
ISSN: 15498328
Author Scopus IDs: 57025003000
Author Affiliations: Barthwal, A., School of Engineering, Jawaharlal Nehru University, New Delhi, 110067, India
Rawat, K., Department of Electronics and Communication Engineering, Iit Roorkee, Roorkee, 247667, India
Koul, S.K., Centre for Applied Research in Electronics, Iit Delhi, New Delhi, 110016, India
Funding Details: Manuscript received July 24, 2020; revised October 30, 2020 and December 14, 2020; accepted December 31, 2020. Date of publication January 20, 2021; date of current version March 8, 2021. This work was supported by SERB Grant CRG/2018/003869, in part by SPARC Grant SPARC/2018-2019/P291/SL. This article was recommended by Associate Editor M. Onabajo. (Corresponding author: Ayushi Barthwal.) Ayushi Barthwal is with the School of Engineering, Jawaharlal Nehru University, New Delhi 110067, India (e-mail: Science and Engineering Research Board, SERB: CRG/2018/003869, SPARC/2018-2019/P291/SL
Corresponding Author: Barthwal, A.; School of Engineering, India; email:
Appears in Collections:Journal Publications [ECE]

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