http://repository.iitr.ac.in/handle/123456789/22403
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Chauhan Y.S. | - |
dc.contributor.author | Yadav C. | - |
dc.contributor.author | Dasgupta, Avirup | - |
dc.contributor.author | Rastogi P. | - |
dc.date.accessioned | 2022-03-21T09:46:05Z | - |
dc.date.available | 2022-03-21T09:46:05Z | - |
dc.date.issued | 2019 | - |
dc.identifier.citation | ICECE 2018 - 10th International Conference on Electrical and Computer Engineering (2019): 1-6 | - |
dc.identifier.isbn | 9.78154E+12 | - |
dc.identifier.uri | https://doi.org/10.1109/ICECE.2018.8636695 | - |
dc.identifier.uri | http://repository.iitr.ac.in/handle/123456789/22403 | - |
dc.description.abstract | In this paper, we show the impact of channel thickness scaling on material and transistor behavior. we present effect of the strain on energy bandgap in scaled Si and Ge slabs for varying thickness. For lower effective mass III-V channel materials, influence of the lower density of states and contribution of multiple subbands on the gate capacitance and drain current in thin body metal-oxide-semiconductor devices are discussed using the numerical simulation and compact model. We present doping strategy for monolayer MoS2 to increase free charge carrier density to increase drive current in MoS2 based transistors. We also discuss compact modeling approach for 2D transition metal dichalcogenide materials-based transistors for early circuit evaluation. © 2018 IEEE. | - |
dc.language.iso | en_US | - |
dc.publisher | Institute of Electrical and Electronics Engineers Inc. | - |
dc.relation.ispartof | ICECE 2018 - 10th International Conference on Electrical and Computer Engineering | - |
dc.relation.ispartof | 10th International Conference on Electrical and Computer Engineering, ICECE 2018 | - |
dc.subject | 2D material | - |
dc.subject | FinFET | - |
dc.subject | Gate-All-Around FET | - |
dc.subject | Germenium | - |
dc.subject | III-V | - |
dc.subject | Nanosheet transistor | - |
dc.subject | Quantum capacitance | - |
dc.subject | Silicon | - |
dc.subject | Strain | - |
dc.title | Atomistic simulation and compact modeling of atomically thin transistors | - |
dc.type | Conference Paper | - |
dc.scopusid | 14029622100 | - |
dc.scopusid | 55767883400 | - |
dc.scopusid | 56389226300 | - |
dc.scopusid | 56463671700 | - |
dc.affiliation | Chauhan, Y.S., Department of Electrical Engineering, Nanolab, Indian Institute of Technology Kanpur, India | - |
dc.affiliation | Yadav, C., IMS Laboratory, University of Bordeaux, Talence Cedex, 33405, France | - |
dc.affiliation | Dasgupta, A., Department of Electrical Engineering and Computer Sciences, University of California, Berkeley, United States | - |
dc.affiliation | Rastogi, P., Department of Electrical Engineering, Nanolab, Indian Institute of Technology Kanpur, India | - |
dc.identifier.conferencedetails | 10th International Conference on Electrical and Computer Engineering, ICECE 2018, 20 - 22, December, 2018 | - |
Appears in Collections: | Conference Publications [ECE] |
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