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Please use this identifier to cite or link to this item: http://repository.iitr.ac.in/handle/123456789/22358
Title: Modeling of Induced Gate Thermal Noise Including Back-Bias Effect in FDSOI MOSFET
Authors: Dabhi C.K.
Dasgupta, Avirup
Kushwaha P.
Agarwal H.
Hu C.
Chauhan Y.S.
Published in: IEEE Microwave and Wireless Components Letters
Abstract: We present a charge-based compact model for induced gate thermal noise for a fully depleted silicon-on-insulator transistor. The model uses front- and back-gate charges as well as the respective mobilities for the development of analytical expression. The model is implemented in Verilog-A and validated with experimentally calibrated TCAD simulations. The model predicts the high-frequency behavior with good accuracy while capturing the back-bias dependence. © 2001-2012 IEEE.
Citation: IEEE Microwave and Wireless Components Letters, 28(7): 597-599
URI: https://doi.org/10.1109/LMWC.2018.2834507
http://repository.iitr.ac.in/handle/123456789/22358
Issue Date: 2018
Publisher: Institute of Electrical and Electronics Engineers Inc.
Keywords: Compact model
fully depleted silicon on insulator (FDSOI)
high frequency
induced gate noise
noise
power spectral density (PSD)
ultrathin body silicon on insulator
ultrathin body with thin box (UTBB)
ISSN: 15311309
Author Scopus IDs: 57200141180
56389226300
56149406100
53866052200
35594318600
14029622100
Author Affiliations: Dabhi, C.K., Department of Electrical Engineering, IIT Kanpur, Kanpur, 208016, India
Dasgupta, A., Department of Electrical Engineering, IIT Kanpur, Kanpur, 208016, India
Kushwaha, P., Department of Electrical Engineering and Computer Science, University of California at Berkely, Berkely, CA 94720, United States
Agarwal, H., Department of Electrical Engineering and Computer Science, University of California at Berkely, Berkely, CA 94720, United States
Hu, C., Department of Electrical Engineering and Computer Science, University of California at Berkely, Berkely, CA 94720, United States
Chauhan, Y.S., Department of Electrical Engineering, IIT Kanpur, Kanpur, 208016, India
Funding Details: Manuscript received January 6, 2018; accepted March 12, 2018. Date of publication May 24, 2018; date of current version July 4, 2018. This work was supported by the Department of Science and Technology, Government of India. (Corresponding author: Chetan Kumar Dabhi.) C. K. Dabhi, A. Dasgupta, and Y. S. Chauhan are with the Department of Electrical Engineering, IIT Kanpur, Kanpur 208016, India (e-mail: chetant@iitk.ac.in; chauhan@iitk.ac.in). Department of Science and Technology, Government of Kerala
Corresponding Author: Dabhi, C.K.; Department of Electrical Engineering, India; email: chetant@iitk.ac.in
Appears in Collections:Journal Publications [ECE]

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