Skip navigation
Please use this identifier to cite or link to this item: http://repository.iitr.ac.in/handle/123456789/22354
Title: Characterization and Modeling of Flicker Noise in FinFETs at Advanced Technology Node
Authors: Kushwaha P.
Agarwal H.
Lin Y.-K.
Dasgupta, Avirup
Kao M.-Y.
Lu Y.
Yue Y.
Chen X.
Wang J.
Sy W.
Yang F.
Chidambaram P.R.C.
Salahuddin S.
Hu C.
Published in: IEEE Electron Device Letters
Abstract: 1/f noise is characterized on thick and thin-gate oxide-based FinFETs for different channel lengths. The devices exhibit gate bias dependence in 1/ {f} noise even in the weak-inversion region of operation which cannot be explained by the existing flicker noise model. We attribute this phenomenon to the non-uniform oxide-trap distribution in energy or space. Based on our characterization results for n- and p-channel FinFETs, we have improved the BSIM-CMG industry standard compact model for the FinFETs. The improved model is able to capture the 1/f noise behavior over a wide range of biases, channel lengths, fin numbers, and number of fingers. © 1980-2012 IEEE.
Citation: IEEE Electron Device Letters, 40(6): 985-988
URI: https://doi.org/10.1109/LED.2019.2911614
http://repository.iitr.ac.in/handle/123456789/22354
Issue Date: 2019
Publisher: Institute of Electrical and Electronics Engineers Inc.
Keywords: compact model
FinFET
flicker noise
ISSN: 7413106
Author Scopus IDs: 56149406100
53866052200
57188827132
56389226300
57201524601
57209848463
57209075382
57206710644
7701314455
36712459300
55323095300
57198119641
8544299000
35594318600
Author Affiliations: Kushwaha, P., Department of Electrical Engineering and Computer Science, University of California at Berkeley, Berkeley, CA 94720, United States
Agarwal, H., Department of Electrical Engineering and Computer Science, University of California at Berkeley, Berkeley, CA 94720, United States
Lin, Y.-K., Department of Electrical Engineering and Computer Science, University of California at Berkeley, Berkeley, CA 94720, United States
Dasgupta, A., Department of Electrical Engineering and Computer Science, University of California at Berkeley, Berkeley, CA 94720, United States
Kao, M.-Y., Department of Electrical Engineering and Computer Science, University of California at Berkeley, Berkeley, CA 94720, United States
Lu, Y., Qualcomm, San Diego, CA 92121, United States
Yue, Y., Qualcomm, San Diego, CA 92121, United States
Chen, X., Qualcomm, San Diego, CA 92121, United States
Wang, J., Qualcomm, San Diego, CA 92121, United States
Sy, W., Qualcomm, San Diego, CA 92121, United States
Yang, F., Qualcomm, San Diego, CA 92121, United States
Chidambaram, P.R.C., Qualcomm, San Diego, CA 92121, United States
Salahuddin, S., Department of Electrical Engineering and Computer Science, University of California at Berkeley, Berkeley, CA 94720, United States
Hu, C., Department of Electrical Engineering and Computer Science, University of California at Berkeley, Berkeley, CA 94720, United States
Funding Details: Manuscript received March 2, 2019; revised April 1, 2019; accepted April 14, 2019. Date of publication April 16, 2019; date of current version May 23, 2019. This work is supported by the Berkeley Device Modeling Center. The review of this letter was arranged by Editor D. Ha. (Corresponding author: Pragya Kushwaha; Ye Lu.) P. Kushwaha, H. Agarwal, Y.-K. Lin, A. Dasgupta, M.-Y. Kao, S. Salahuddin, and C. Hu are with the Department of Electrical Engineering and Computer Science, University of California at Berkeley, Berkeley, CA 94720 USA (e-mail: pragya@berkeley.edu).
Corresponding Author: Kushwaha, P.; Department of Electrical Engineering and Computer Science, United States; email: pragya@berkeley.edu
Appears in Collections:Journal Publications [ECE]

Files in This Item:
There are no files associated with this item.
Show full item record


Items in Repository are protected by copyright, with all rights reserved, unless otherwise indicated.