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Please use this identifier to cite or link to this item: http://repository.iitr.ac.in/handle/123456789/16141
Title: FPGA implementation of image dehazing algorithm for real time applications
Authors: Kumar R.
Kumar Kaushik, Brajesh
Balasubramanian R.
Tescher A.G.
Published in: Proceedings of SPIE - The International Society for Optical Engineering
Abstract: Weather degradation such as haze, fog, mist, etc. severely reduces the effective range of visual surveillance. This degradation is a spatially varying phenomena, which makes this problem non trivial. Dehazing is an essential preprocessing stage in applications such as long range imaging, border security, intelligent transportation system, etc. However, these applications require low latency of the preprocessing block. In this work, single image dark channel prior algorithm is modified and implemented for fast processing with comparable visual quality of the restored image/video. Although conventional single image dark channel prior algorithm is computationally expensive, it yields impressive results. Moreover, a two stage image dehazing architecture is introduced, wherein, dark channel and airlight are estimated in the first stage. Whereas, transmission map and intensity restoration are computed in the next stages. The algorithm is implemented using Xilinx Vivado software and validated by using Xilinx zc702 development board, which contains an Artix7 equivalent Field Programmable Gate Array (FPGA) and ARM Cortex A9 dual core processor. Additionally, high definition multimedia interface (HDMI) has been incorporated for video feed and display purposes. The results show that the dehazing algorithm attains 29 frames per second for the image resolution of 1920x1080 which is suitable of real time applications. The design utilizes 9 18K-BRAM, 97 DSP-48, 6508 FFs and 8159 LUTs. © 2017 SPIE.
Citation: Proceedings of SPIE - The International Society for Optical Engineering, (2017)
URI: https://doi.org/10.1117/12.2274682
http://repository.iitr.ac.in/handle/123456789/16141
Issue Date: 2017
Publisher: SPIE
Keywords: FPGA
HDMI input/output
image dehazing
video processing
Xilinx high level synthesis (HLS) library
ISBN: 9.78E+12
ISSN: 0277786X
Author Scopus IDs: 57211197963
57021830600
7103127999
Author Affiliations: Kumar, R., Department of Electronics and Communication Engineering, India
Kaushik, B.K., Department of Electronics and Communication Engineering, India
Balasubramanian, R., Department of Computer Science and Engineering, Indian Institute of Technology, Roorkee, 247667, India
Appears in Collections:Conference Publications [ECE]

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