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Showing results 1 to 20 of 55  next >
Issue DateTitleAuthor(s)
2008A compact drain current and threshold voltage quantum mechanical analytical modeling for FinFETsRaj B.; Saxena A.K.; Dasgupta, Sudeb
2011A low-noise, process-variation-tolerant double-gate FinFET based sense amplifierRathod S.S.; Saxena A.K.; Dasgupta, Sudeb
2010A proposed DG-FinFET based SRAM cell design with RadHard capabilitiesRathod S.S.; Saxena A.K.; Dasgupta, Sudeb
2017A unified Verilog-A compact model for lateral Si nanowire (NW) FET incorporating parasitics for circuit simulationPrakash O.; Maheshwaram S.; Sharma M.; Anand, Bulusu; Saxena A.K.; Manhas, Sanjeev Kumar
2017A unified Verilog-A compact model for lateral Si nanowire (NW) FET incorporating parasitics for circuit simulationPrakash O.; Maheshwaram S.; Sharma M.; Anand, Bulusu; Saxena A.K.; Manhas S.K.
2011Alpha-particle-induced effects in partially depleted silicon on insulator device: With and without body contactRathod S.S.; Saxena A.K.; Dasgupta, Sudeb
2012Analog performance analysis of dual-k spacer based underlap FinFETNandi A.; Saxena A.K.; Dasgupta, Sudeb
2012Analysis of double-gate FinFET-based address decoder for radiation-induced single-event-transientsRathod S.S.; Saxena A.K.; Dasgupta, Sudeb
2009Analytical modeling for the estimation of leakage current and subthreshold swing factor of nanoscale double gate FinFET deviceRaj B.; Saxena A.K.; Dasgupta, Sudeb
2013Analytical modeling of a double gate mosfet considering source/drain lateral gaussian doping profileNandi A.; Saxena A.K.; Dasgupta, Sudeb
2009Analytical modeling of double gate MOSFET using back gate insulator thickness variationVishvakarma S.K.; Saxena A.K.; Dasgupta, Sudeb; Fjeldly T.A.
2009Analytical modeling of inversion charge density for nanoscale Dual Metal Gate (Hf/AINX) and Midgap Symmetric Double Gate MOSFETVishvakarma S.K.; Saxena A.K.; Dasgupta, Sudeb
2010Analytical modeling of potential and drain current for Symmetric Double Gate (SDG) MOSFET using self consistent solution of 1-D poisson's- schrödinger equationsVishvakarma S.K.; Saxena A.K.; Dasgupta, Sudeb
2010Analytical modeling of potential and drain current for Symmetric Double Gate (SDG) MOSFET using self consistent solution of 1-D poisson's- schrödinger equationsVishvakarma S.K.; Saxena A.K.; Dasgupta, Sudeb
2009Analytical modeling of symmetric double gate (SDG) MOSFET Using 1D Schrödinger-Poisson equation solutionVishvakarma S.K.; Saxena A.K.; Dasgupta, Sudeb
2009Analytical modeling of symmetric double gate (SDG) MOSFET Using 1D Schrödinger-Poisson equation solutionVishvakarma S.K.; Saxena A.K.; Dasgupta, Sudeb
2007Analytical modeling of threshold voltage for nanoscale Symmetric Double Gate (SDG) MOSFET with ultra thin body (UTB)Vishvakarma S.K.; Raj B.; Singh R.; Panda C.R.; Saxena A.K.; Dasgupta, Sudeb
2016Compact model for vertical silicon nanowire based device simulation and circuit designSharma M.; Maheshwaram S.; Prakash O.; Anand, Bulusu; Saxena A.K.; Manhas, Sanjeev Kumar
2011Comparative analysis of SEU in FinFET SRAM cells for superthreshold and subthreshold supply voltage operationRathod S.S.; Saxena A.K.; Dasgupta, Sudeb
2013Design and analysis of analog performance of dual-k spacer underlap N/P-FinFET at 12 nm gate lengthNandi A.; Saxena A.K.; Dasgupta, Sudeb