| Issue Date | Title | Author(s) |
| 2015 | A comparative analysis of symmetric and asymmetric dual-k spacer FinFETs from device and circuit perspectives | Pal P.K.; Kumar Kaushik, Brajesh; Anand, Bulusu; Dasgupta S. |
| 2016 | A transformed analytical model for thermal noise of FinFET based on fringing field Approximation | Sharma S.M.; Dasgupta S.; Kartikeyan, Machavaram Venkata |
| 2015 | An 8 bit, 100 kS/s, switch-capacitor DAC SAR ADC for RFID applications | Joshi A.; Manhas, Sanjeev Kumar; Sharma S.K.; Dasgupta S. |
| 2012 | Analysis of propagation delay in mixed carbon nanotube bundle as global VLSI interconnects | Das P.K.; Majumder M.K.; Kumar Kaushik, Brajesh; Dasgupta S. |
| 2015 | Design and analysis of low power and area efficient single capacitor DAC based successive approximation ADC using 45 Nm Fin FET | Joshi A.; Sharma S.K.; Manhas, Sanjeev Kumar; Dasgupta S.; Tomar G.S. |
| 2018 | FinFETs for RF Applications: A Literature review | Sharma S.M.; Dasgupta S.; Kartikeyan, Machavaram Venkata |
| 2013 | Impact of series resistance on Si nanowire MOSFET performance | Kaushal G.; Manhas, Sanjeev Kumar; Maheshwaram S.; Dasgupta S. |
| 2012 | Novel modeling approach for multi-walled CNT bundle in global VLSI interconnects | Kumar J.; Majumder M.K.; Kumar Kaushik, Brajesh; Dasgupta S.; Manhas, Sanjeev Kumar |
| 2012 | Performance analysis of dual-k spacer at source side for underlap FinFETs | Pal P.K.; Singh P.; Kumar Kaushik, Brajesh; Anand, Bulusu; Dasgupta S. |
| 2017 | Successive Conformal Mapping Technique to Extract Inner Fringe Capacitance of Underlap DG-FinFET and Its Variations with Geometrical Parameters | Sharma S.M.; Dasgupta S.; Kartikeyan, Machavaram Venkata |
