IITR's Institutional Repository: Browsing Repository

Jump to: 0-9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
or enter first few letters:

Showing results 1 to 20 of 28 next >

Issue Date	Title	Author(s)
2016	A variation aware timing model for a 2-input NAND gate and its use in sub-65 nm CMOS standard cell characterization	Kaur B.; Sharma A.; Alam N.; Manhas, Sanjeev Kumar; Anand, Bulusu
2016	A variation aware timing model for a 2-input NAND gate and its use in sub-65 nm CMOS standard cell characterization	Kaur B.; Sharma A.; Alam N.; Manhas S.K.; Anand, Bulusu
2015	An 8 bit, 100 kS/s, switch-capacitor DAC SAR ADC for RFID applications	Joshi A.; Manhas, Sanjeev Kumar; Sharma S.K.; Dasgupta S.
2015	An 8 bit, 100 kS/s, switch-capacitor DAC SAR ADC for RFID applications	Joshi A.; Manhas S.K.; Sharma S.K.; Dasgupta, Sudeb
2014	An accurate model for dynamic crosstalk analysis of CMOS gate driven on-chip interconnects using FDTD method	Kumar V.R.; Kumar Kaushik, Brajesh; Patnaik, Amalendu
2010	An analytical approach to dynamic crosstalk in coupled interconnects	Kumar Kaushik, Brajesh; Sarkar S.; Agarwal R.P.; Joshi R.C.
2019	An energy-efficient variation aware self-correcting latch	Kumar C.I.; Sharma A.K.; Partap R.; Anand, Bulusu
2019	An energy-efficient variation aware self-correcting latch	Kumar C.I.; Sharma A.K.; Partap R.; Anand, Bulusu
2019	An optimal device sizing for a performance-driven and area-efficient subthreshold cell library for IoT applications	Sharma P.; Jain P.; Das, Bishnu Prasad
2013	Analytical modeling and parameter extraction of top and bottom contact structures of organic thin film transistors	Kumar B.; Kumar Kaushik, Brajesh; Negi, Yuvraj Singh; Saxena S.; Varma, Ghanshyam Das
2011	Analytical modeling of subthreshold current and subthreshold swing of an underlap DGMOSFET with tiedindependent gate and symmetricasymmetric options	Vaddi R.; Agarwal R.P.; Dasgupta, Sudeb
2013	Bus encoder design for reduced crosstalk, power and area in coupled VLSI interconnects	Kumar Kaushik, Brajesh; Agarwal D.; Babu N.G.
2012	Channel length variation effect on performance parameters of organic field effect transistors	Mittal P.; Kumar B.; Negi, Yuvraj Singh; Kumar Kaushik, Brajesh; Singh R.K.
2021	Computing-in-memory using voltage-controlled spin-orbit torque based MRAM array	Shreya S.; Jain A.; Kumar Kaushik, Brajesh
2008	Crosstalk analysis for a CMOS gate driven inductively and capacitively coupled interconnects	Kumar Kaushik, Brajesh; Sarkar S.
2011	Electrical performance study of 25 nm Ω-FinFET under the influence of gamma radiation: A 3D simulation	Rathod S.S.; Saxena A.K.; Dasgupta, Sudeb
2012	Impact of dual-k spacer on analog performance of underlap FinFET	Nandi A.; Saxena A.K.; Dasgupta, Sudeb
2015	Improved crosstalk noise modeling of MWCNT interconnects using FDTD technique	Kumar V.R.; Kumar Kumar Kaushik, Brajesh; Patnaik, Amalendu
2001	Influence of ionising radiation on the performance of CMOS inverter	Chauhan R.K.; Dasgupta, Sudeb; Chakrabarti P.
2015	Low power SRAM design for 14 nm GAA Si-nanowire technology	Kaushal G.; Jeong H.; Maheshwaram S.; Manhas, Sanjeev Kumar; Dasgupta, Sudeb; Jung S.O.

Showing results 1 to 20 of 28 next >

Browsing by Published In Microelectronics Journal