Issue Date | Title | Author(s) |
2021 | An Efficient and Accurate Variation-Aware Design Methodology for Near-Threshold MOS-Varactor-Based VCO Architectures | Dani L.M.; Mishra N.; Anand, Bulusu |
2021 | An Efficient and Accurate Variation-Aware Design Methodology for Near-Threshold MOS-Varactor-Based VCO Architectures | Dani L.M.; Mishra N.; Anand, Bulusu |
2004 | An efficient technique for exploring register file size in ASIP design | Jain, Manoj Kumar; Balakrishnan M.; Kumar A. |
2001 | Analysis of the Influence of Register File Size on Energy Consumption, Code Size, and Execution Time | Wehmeyer L.; Jain, Manoj Kumar; Steinke S.; Marwedel P.; Balakrishnan M. |
2009 | Closed-form delay and crosstalk models for RLC on-chip interconnects using a matrix rational approximation | Roy, Sourajeet; Dounavis A. |
2008 | Crosstalk analysis for a CMOS-gate-driven coupled interconnects | Kumar Kaushik, Brajesh; Sarkar S. |
2017 | Delay-bounded intravehicle network routing algorithm for minimization of wiring weight and wireless transmit power | Huang T.-Y.; Chang C.-J.; Lin C.-W.; Roy, Sudip; Ho T.-Y. |
2017 | Dilution and Mixing Algorithms for Flow-Based Microfluidic Biochips | Bhattacharjee S.; Poddar S.; Roy, Sudip; Huang J.-D.; Bhattacharya B.B. |
2020 | Lookup Table-Based Fast Reliability-Aware Sample Preparation Using Digital Microfluidic Biochips | Shao L.; Li W.; Ho T.-Y.; Roy, Sudip; Yao H. |
2021 | Mixing Models as Integer Factorization: A Key to Sample Preparation with Microfluidic Biochips | Kundu D.; Roy, Sudip; Bhattacharjee S.; Saha S.; Chakrabarty K.; Chakrabarti P.P.; Bhattacharya B.B. |
2014 | On-chip sample preparation for multiple targets using digital microfluidics | Mitra D.; Roy, Sudip; Bhattacharjee S.; Chakrabarty K.; Bhattacharya B.B. |
2010 | Optimization of dilution and mixing of biochemical samples using digital microfluidic biochips | Roy, Sudip; Bhattacharya B.B.; Chakrabarty K. |
2019 | Reliability Analysis of Mixture Preparation Using Digital Microfluidic Biochips | Singla A.; Agarwal V.; Roy, Sudip; Mondal A. |
2016 | Sparse Linear Regression (SPLINER) Approach for Efficient Multidimensional Uncertainty Quantification of High-Speed Circuits | Ahadi M.; Roy, Sourajeet |
2011 | Transient simulation of distributed networks using delay extraction based numerical convolution | Roy, Sourajeet; Dounavis A. |