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Browsing by Author Pelto C.

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Issue DateTitleAuthor(s)
2015A 14nm logic technology featuring 2nd-generation FinFET, air-gapped interconnects, self-aligned double patterning and a 0.0588 μm2 SRAM cell sizeNatarajan S.; Agostinelli M.; Akbar S.; Bost M.; Bowonder A.; Chikarmane V.; Chouksey S.; Dasgupta, Avirup; Fischer K.; Fu Q.; Ghani T.; Giles M.; Govindaraju S.; Grover R.; Han W.; Hanken D.; Haralson E.; Haran M.; Heckscher M.; Heussner R.; Jain P.; James R.; Jhaveri R.; Jin I.; Kam H.; Karl E.; Kenyon C.; Liu M.; Luo Y.; Mehandru R.; Morarka S.; Neiberg L.; Packan P.; Paliwal A.; Parker C.; Patel P.; Patel R.; Pelto C.; Pipes L.; Plekhanov P.; Prince M.; Rajamani S.; Sandford J.; Sell B.; Sivakumar S.; Smith P.; Song B.; Tone K.; Troeger T.; Wiedemer J.; Yang M.; Zhang K.