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Browsing by Author Kaushik B.K.

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Showing results 1 to 16 of 16
Issue DateTitleAuthor(s)
2017A 10T subthreshold SRAM cell with minimal bitline switching for ultra-low power applicationsSwaati; Das, Bishnu Prasad; Kaushik B.K.; Dasgupta S.; Singh V.
2015A comparative analysis of symmetric and asymmetric dual-k spacer FinFETs from device and circuit perspectivesPal P.K.; Kaushik B.K.; Anand, Bulusu; Dasgupta S.
2015A comparative analysis of symmetric and asymmetric dual-k spacer FinFETs from device and circuit perspectivesPal P.K.; Kaushik B.K.; Anand B.; Dasgupta, Sudeb
2012Analysis of propagation delay in mixed carbon nanotube bundle as global VLSI interconnectsDas P.K.; Majumder M.K.; Kaushik B.K.; Dasgupta, Sudeb
2019Crosstalk Analysis in MWCNTs using a Closed-Form Matrix Rational Approximation TechniqueKumar A.; Kaushik B.K.; Roy, Sourajeet; Achar R.
2012Dynamic crosstalk effect in multi-layer graphene nanoribbon interconnectsReddy K.N.; Majumder M.K.; Kaushik B.K.; Manhas S.K.; Anand, Bulusu
2017Effectiveness of high permittivity spacer for underlap regions of wavy-junctionless finfet at 22 nm node and scaling short channel effectsVandana B.; Das J.K.; Mohapatra S.K.; Kumar Kaushik, Brajesh; Kaushik B.K.; Dasgupta S.; Singh V.
2012Novel modeling approach for multi-walled CNT bundle in global VLSI interconnectsKumar J.; Majumder M.K.; Kaushik B.K.; Dasgupta, Sudeb; Manhas S.K.
2012Optimized delay and power performances in multilayer graphene nanoribbon interconnectsReddy K.N.; Majumder M.K.; Kaushik B.K.; Anand, Bulusu; Das P.K.
2012Performance analysis of dual-k spacer at source side for underlap FinFETsPal P.K.; Singh P.; Kaushik B.K.; Anand B.; Dasgupta, Sudeb
2012Performance analysis of dual-k spacer at source side for underlap FinFETsPal P.K.; Singh P.; Kaushik B.K.; Anand, Bulusu; Dasgupta S.
2019Prospective design of graphene-based patch antenna with proximity feed for mid-THz bandYadav V.S.; Kulshreshtha S.; Kaushik B.K.; Patnaik, Amalendu
2021Reflective Type Linear to Circular Polarization Converter Using Metasurface over a Wide Frequency BandYadav V.S.; Nayak A.K.; Kaushik B.K.; Patnaik, Amalendu
2019Temperature-aware closed-form matrix rational approximation model for crosstalk analysis of multi-walled carbon nanotube interconnectsGuglani S.; Kumar A.; Kumar R.; Kaushik B.K.; Sharma R.; Achar R.; Roy, Sourajeet
2017Vertical nanowire FET based standard cell design employing Verilog-A compact model for higher performanceMaheshwaram S.; Prakash O.; Sharma M.; Anand, Bulusu; Manhas, Sanjeev Kumar; Kaushik B.K.; Dasgupta S.; Singh V.
2017Vertical nanowire FET based standard cell design employing Verilog-A compact model for higher performanceMaheshwaram S.; Prakash O.; Sharma M.; Anand, Bulusu; Manhas S.; Kaushik B.K.; Dasgupta S.; Singh V.