Issue Date | Title | Author(s) |
2020 | Analysis and Modeling of Polarization Gradient Effect on Negative Capacitance FET | Kao M.-Y.; Pahwa G.; Dasgupta, Avirup; Salahuddin S.; Hu C. |
2020 | BSIM compact model of quantum confinement in advanced nanosheet FETs | Dasgupta, Avirup; Parihar S.S.; Kushwaha P.; Agarwal H.; Kao M.-Y.; Salahuddin S.; Chauhan Y.S.; Hu C. |
2015 | BSIM-CMG: Standard FinFET compact model for advanced circuit design | Duarte J.P.; Khandelwal S.; Medury A.; Hu C.; Kushwaha P.; Agarwal H.; Dasgupta, Avirup; Chauhan Y.S.; Dielacher F.; Pribyl W.; Hueber G. |
2020 | BSIM-IMG: Advanced Model for FDSOI Transistors with Back Channel Inversion | Agarwal H.; Kushwaha P.; Dasgupta, Avirup; Y-Kao M.; Morshed T.; Workman G.; Shanbhag K.; Li X.; Vinothkumar V.; Chauhan Y.S.; Salahuddin S.; Hu C. |
2019 | Characterization and Modeling of Flicker Noise in FinFETs at Advanced Technology Node | Kushwaha P.; Agarwal H.; Lin Y.-K.; Dasgupta, Avirup; Kao M.-Y.; Lu Y.; Yue Y.; Chen X.; Wang J.; Sy W.; Yang F.; Chidambaram P.R.C.; Salahuddin S.; Hu C. |
2016 | Characterization of RF Noise in UTBB FD-SOI MOSFET | Kushwaha P.; Dasgupta, Avirup; Sahu Y.; Khandelwal S.; Hu C.; Chauhan Y.S. |
2020 | Compact Model for Geometry Dependent Mobility in Nanosheet FETs | Dasgupta, Avirup; Parihar S.S.; Agarwal H.; Kushwaha P.; Chauhan Y.S.; Hu C. |
2018 | Compact Modeling of Cross-Sectional Scaling in Gate-All-Around FETs: 3-D to 1-D Transition | Dasgupta, Avirup; Rastogi P.; Agarwal A.; Hu C.; Chauhan Y.S. |
2017 | Compact Modeling of Drain Current Thermal Noise in FDSOI MOSFETs Including Back-Bias Effect | Sahu Y.; Kushwaha P.; Dasgupta, Avirup; Hu C.; Chauhan Y.S. |
2021 | Compact Modeling of Temperature Effects in FDSOI and FinFET Devices down to Cryogenic Temperatures | Pahwa G.; Kushwaha P.; Dasgupta, Avirup; Salahuddin S.; Hu C. |
2020 | Design Optimization Techniques in Nanosheet Transistor for RF Applications | Kushwaha P.; Dasgupta, Avirup; Kao M.-Y.; Agarwal H.; Salahuddin S.; Hu C. |
2021 | Energy Storage and Reuse in Negative Capacitance | Kao M.-Y.; Liao Y.-H.; Pahwa G.; Dasgupta, Avirup; Salahuddin S.; Hu C. |
2020 | Gate-All-Around FET Design Rule for Suppression of Excess Non-Linearity | Dasgupta, Avirup; Hu C. |
2017 | Modeling of Body-Bias Dependence of Overlap Capacitances in Bulk MOSFETs | Dasgupta, Avirup; Gupta C.; Dutta A.; Lin Y.-K.; Srihari S.; Ethirajan T.; Hu C.; Chauhan Y.S. |
2018 | Modeling of Induced Gate Thermal Noise Including Back-Bias Effect in FDSOI MOSFET | Dabhi C.K.; Dasgupta, Avirup; Kushwaha P.; Agarwal H.; Hu C.; Chauhan Y.S. |
2019 | Modeling the Quantum Gate capacitance of Nano-Sheet Gate-All-Around MOSFET | Kushwaha P.; Agarwal H.; Mishra V.; Dasgupta, Avirup; Lin Y.-K.; Kao M.-Y.; Chauhan Y.S.; Salahuddin S.; Hu C. |
2019 | Optimization of NCFET by Matching Dielectric and Ferroelectric Nonuniformly Along the Channel | Kao M.-Y.; Lin Y.-K.; Agarwal H.; Liao Y.-H.; Kushwaha P.; Dasgupta, Avirup; Salahuddin S.; Hu C. |
2019 | Proposal for capacitance matching in negative capacitance field-effect transistors | Agarwal H.; Kushwaha P.; Lin Y.-K.; Kao M.-Y.; Liao Y.-H.; Dasgupta, Avirup; Salahuddin S.; Hu C. |
2019 | Spacer Engineering in Negative Capacitance FinFETs | Lin Y.-K.; Agarwal H.; Kao M.-Y.; Zhou J.; Liao Y.-H.; Dasgupta, Avirup; Kushwaha P.; Salahuddin S.; Hu C. |