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Browsing by Author Prakash O.

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Showing results 4 to 15 of 15 < previous

Issue Date	Title	Author(s)
2016	Compact model for vertical silicon nanowire based device simulation and circuit design	Sharma M.; Maheshwaram S.; Prakash O.; Anand, Bulusu; Saxena A.K.; Manhas, Sanjeev Kumar
2017	Compact NBTI reliability modeling in Si nanowire MOSFETs and effect in circuits	Prakash O.; Beniwal S.; Maheshwaram S.; Anand, Bulusu; Singh N.; Manhas, Sanjeev Kumar
2017	Compact NBTI reliability modeling in Si nanowire MOSFETs and effect in circuits	Prakash O.; Beniwal S.; Maheshwaram S.; Anand, Bulusu; Singh N.; Manhas S.K.
2020	Elucidating the deformation modes in incremental sheet forming process: Insights from crystallographic texture, microstructure and mechanical properties	Mishra, S.; Yazar K.U.; More A.M.; Kumar L.; Lingam R.; Reddy N.V.; Prakash O.; Suwas S.
2021	Heterolayered TiO2@layered double hydroxide-MoS2 nanostructure for simultaneous adsorption-photocatalysis of co-existing water contaminants	Panchal D.; Sharma A.; Mondal, Prasenjit; Prakash O.; Pal S.
2020	Impact of NBTI Aging on Self-Heating in Nanowire FET	Prakash O.; Amrouch H.; Manhas, Sanjeev Kumar; Henkel J.; Di Natale G.; Bolchini C.; Vatajelu E.-I.
2017	Lateral silicon nanowire based standard cell design for higher performance	Prakash O.; Sharma M.; Anand, Bulusu; Saxena A.K.; Manhas, Sanjeev Kumar; Maheshwaram S.
2017	Lateral silicon nanowire based standard cell design for higher performance	Prakash O.; Sharma M.; Anand, Bulusu; Saxena A.K.; Manhas S.K.; Maheshwaram S.
2017	Performance and Variability Analysis of SiNW 6T-SRAM Cell Using Compact Model with Parasitics	Prakash O.; Maheshwaram S.; Sharma M.; Anand, Bulusu; Manhas, Sanjeev Kumar
2021	Texture and Microstructure Evolution During Single-Point Incremental Forming of Commercially Pure Titanium	Mishra, S.; Yazar K.U.; Kar A.; Lingam R.; Reddy N.V.; Prakash O.; Suwas S.
2017	Vertical nanowire FET based standard cell design employing Verilog-A compact model for higher performance	Maheshwaram S.; Prakash O.; Sharma M.; Anand, Bulusu; Manhas, Sanjeev Kumar; Kaushik B.K.; Dasgupta S.; Singh V.
2017	Vertical nanowire FET based standard cell design employing Verilog-A compact model for higher performance	Maheshwaram S.; Prakash O.; Sharma M.; Anand, Bulusu; Manhas S.; Kaushik B.K.; Dasgupta S.; Singh V.

Showing results 4 to 15 of 15 < previous