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Browsing by Author Agarwal R.P.

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Issue Date	Title	Author(s)
2007	Voltage scaling - A novel approach for crosstalk reduction in global VLSI interconnects	Kumar Kaushik, Brajesh; Sarkar S.; Agarwal R.P.; Joshi R.C.
2007	Waveform analysis and delay prediction for a CMOS gate driving RLC interconnect load	Kumar Kaushik, Brajesh; Sarkar S.; Agarwal R.P.
2007	Waveform analysis and delay prediction in simultaneously switching CMOS gate driven inductively and capacitively coupled on-chip interconnects	Kumar Kaushik, Brajesh; Sarkar S.; Agarwal R.P.; Joshi R.C.
2006	Width optimization of global inductive VLSI interconnects	Kumar Kaushik, Brajesh; Sarkar S.; Agarwal R.P.

Showing results 30 to 33 of 33 < previous